The Conference aims at gathering together scientists and engineers working in academia, research centers and industry in the field of SOI technology and nanoscale devices in More-Moore and More-Than-Moore scenarios. 

High quality contributions in the following areas are solicited:  

  1. Advanced SOI materials and structures, innovative SOI-like devices.  
  2. Alternative transistor architectures (FDSOI, Nanowire, Nanosheet, FinFET, MuGFET, vertical MOSFET, FeFET and TFET, MEMS/NEMS, Beyond-CMOS).  
  3. New channel materials for CMOS (strained Si/Ge, III-V, carbon nanotubes; graphene and other 2D materials).  
  4. Properties of ultra-thin semiconductor films and buried oxides, defects, interface quality; thin gate dielectrics: high-κ and ferroelectric materials for switches and memory.  
  5. New functionalities and innovative devices in the More than Moore domain: nanoelectronic sensors, biosensor devices, memrisors, neuromorphic computing devices, quantum computing devices, energy harvesting devices, RF devices, imagers, integrated photonics (on SOI), etc.  
  6. Transport phenomena, compact modeling, device simulation, front- and back-end process simulation.  
  7. CMOS scaling perspectives; device/circuit level performance evaluation; switches and memory scaling; three-dimensional integration of devices and circuits, heterogeneous integration.  

Advanced test structures and characterization techniques, parameter extraction, reliability and variability assessment techniques for new materials and novel devices.  

Original 2-page abstracts with illustrations will be reviewed by the Scientific Committee. The accepted contributions will be published as 4-page letters in a special issue of the Elsevier journal Solid-State Electronics.  

Extended versions of outstanding papers will be published in a further special issue of Solid-State Electronics.  

The “Androula Nassiopoulou Best Paper Award" will be attributed by the SINANO institute.  

A best poster award will be attributed by ELSEVIER.